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SEMICONDUCTOR MANUFACTURING OPERATIONAL
MODELING AND SIMULATION SYMPOSIUM
part of
2001 Advanced Simulation Technologies Conference

APRIL 22 - 26

Sponsored by
The Society for Computer Simulation International
Phone: (858) 277-3888; Fax: (858) 277-3930
e-mail: astc01@scs.org; http://www.scs.org
Chairs: Jeffery K. Cochran, Arizona State University
Javier Bonal, Lucent Technologies
The electronics industry is the largest basic industry in the USA. At current annual growth rates, it has been predicted that within a decade, electronics will be the biggest worldwide industry after agriculture. At the heart of this industry is the manufacturing of integrated circuts. The industry has traditionally had high tech products, processes and manufacturing methods, but until recently, sophisticated techniques have not been used to model semiconductor manufacturing operations. The National Technology Roadmap for Semiconductors identifies modeling and simulation as a critical need for factory integration. The SMOMS `01 conference intends to be a forum for international efforts to meet those needs.
E Resource Database
Rohana Abdullah, On Semiconductor, W. Malaysia
The Impact on Technology Acceleration on Semiconductor Equipment Suppliers
Dave Anderson, International SEMATECH, USA
Dynamics and Control of Supply Chains in Semiconductor Manufacturing
Benjamin Armbruster, Arizona State University, USA
Dealing With the Challenges of Modeling a Constant WIP Semiconductor Fab
James L. Berry,
Applications of Fluid Models to Semiconductor Fab Operations
Ron Billings, International SEMATECH, USA
Methodology for Wafer Fab Model Validation
Javier Bonal, Agere Systems, Spain
Object-Oriented Simulation Platform Construction for the Modeling of Virtual Fab by Using SiMPLE
I-Hui Chang, Piotech Co. Ltd., Taiwan
A Study of Due Date Control by Using TOC?s Aggregates Buffer Approach
Sheng-Hung Chang, Minghsin Institute of Technology
Optimizing Multi-Objective Production and Setting Daily Production Goals For a Wafer Fabrication Facility
Hung-Nan Chen, Motorola, USA
Analyzing the Repair Decisions in the Site Unbalance Problem of Semiconductor Test Machine
Chen-Fu Chien, National Tsing Hua University, Taiwan
Design of a Scheduling System with Application to Diffusion Process
You-In Choung, Samsung Electronics, Korea
The Design of Cycle Time Estimation Model for the Wafer Fabrication with Multiple-Priority Orders
S.H. Chung, National Chiao Tung University, Taiwan
Optimal Buffer Settings for Serial Systems
Guy L. Curry, Moonsu Lee, Texas A&M University, USA
Modeling the Cycle Time and Departure Process for a Single Server Workstation with Random Sized Batch Arrivals
Guy L. Curry, Don T. Phillips, Texas A&M University, USA
Optimal Opportunistic Maintenance Policies for Semiconductor Manufacturing
Esma Gel, Arizona State University, USA
Capacity Planning Under Uncertainty
Sarah Hood, IBM, USA
Multi-Functional Integrated Simulation Environment for Printed Circuit Board Production
Sachin Jain, University of Illinois at Urbana-Champaign, USA
A Virtual Cluster Tool Model for Cluster Tool Controller and Scheduler Development
Yong-Jae Joo, KAIST, Korea
Neff=1: An Efficient Method for Obtaining SPC Limits for Semiconductor Processing
Madhukar Joshi, Texas Instruments, USA
On the Uses of Simulation in the Planning and Ramp Phases of a High Volume Manufacturing FAB
Adar Kalir, Orion Avidan, Intel Corporation, Israel
A Hierarchical Scheduling Approach for Semiconductor Assembly Facilities
Heinrich Kuhn, Catholic University of Eichstaett, Germany
An Efficient Classification Method for Wafer Testing Using Principal Component Analysis and Mahalanobis Distance
Te-Sheng Li,
The Manufacture/Outsource Decision in Electronics Manufacturing
Scott Mason, University of Arkansas, USA
The Automated Simulation Validation System
Cabe Nicksic, Advanced Micro Devices, USA
The Design and Development of a Production Data Warehouse for IC Foundry
Der-Baau Perng, National Chiao Tung University, Taiwan
Investigating Benefits of Heterogeneous Implementation of Conservative Synchronization Policies in Large Scale Semiconductor Manufacturing Models
Igor Paprotny, Arizona State University, USA
CONWIP-like Lot Release for a Wafer Fabrication Facility with Product Mix Changes
Oliver Rose, Germany
Making Hot Hot Lots Hotter: Impact on System Stability
Kristin Rust, Sematech, USA
Reduction of Average Cycle Time at a Wafer Fabrication Facility
Subhash Sarin, Virginia Polytechnic Institute and State University, USA
Comparison of Dispatching Rules for a Large Semiconductor Manufacturing Facility
Alexander Schoemig, Infenion Technologies, Germany
An Intelligent Approach for Simultaneous Optimization of a BGA Wire Bonding Process
Tai-Lin Chiang,
A Look-Ahead AGV Control Procedure Considering Part and AGV Blocking for Semiconductor and LCD Production
Jungdae Suh,
Scheduling for a Flowshop of Two Batch Processing Machines with Due Date Related Measures Incorporated
Chang Sup Sung, Korea Advanced Institute of Science and Technology, Korea
Use Of Cluster Tool Modeling To Improve Throughput On CVD Tools
Keith Pare, Advanced Micro Devices, USA

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